About

Above the RTL · Notes is the technical reference site for Above the RTL, a Substack publication on AI and chip design written from inside the industry.

The Substack carries the narrative — what's happening in AI-for-silicon, what works, what doesn't, what's actually worth an engineer's attention. This site carries the reference material that sits behind those posts: the physics, the MTBF arithmetic, the archetype catalogs, the long-form work that would bog down a post but matters to engineers actually closing sign-off.

Current focus

The initial library is building out around clock domain crossing — synchronizer physics, the archetypes of CDC failure, MTBF analysis across frequency regimes, methodology for putting AI into a CDC flow, and the correct-by-construction vs. safe-under-assumptions question that every reusable block eventually faces. Each reference note here is a companion to a narrative post on the Substack.

Adjacent topics that will land in the library as the series grows: formal verification methodology, assertion-based design, Design by Contract for hardware, and evaluation of AI models on chip-design tasks.

How this site relates to the Substack

Posts on abovethertl.com cover the argument. Notes here cover the analysis. Where a post says "the full derivation is in a companion note," that note lives on this site. Readers who want the narrative can stay on Substack; readers who want the physics follow the links here.

Marco Brambilla — Semiconductor industry veteran, 25 years in chip design. Most recently Senior Technical Director at Meta Reality Labs. Previously VP of Engineering at Synapse Design, and DFT architecture at STMicroelectronics. Deep expertise in SoC design, DFT, formal verification, CDC/RDC, ultra-low-power methodology, and AI-native design workflow. Based in the San Francisco Bay Area.

Contact via LinkedIn, GitHub, or Substack subscription.